Principals of Spectral Design and Test Inc.
Deepak Mehta
Deepak has over 20 years of product and technical management experience in (EDA) Electronic Design Automation (EDA) and Intellectual Property (IP) companies. He started his career as a circuit designer at Silicon Compiler Systems /Mentor Graphics developing structured ASIC design with special emphasis on memory and datapath compilers. Deepak was instrumental in growing the custom Memory design (RAMs, CAMs, ROMs) business at Mentor Graphics to become a multi-million dollar product line. At Virage Logic, as Sr. Director of Engineering, Deepak built a world class organization of memory designers working on High Density SRAM product line. He had direct responsibility of pre-sales, implementation and post sales support. At Spectral, Deepak is responsible for daily operations and all aspects of product development in the areas of design and test solutions. He has two patents and several publications. Deepak has a MS in Electrical engineering from Rutgers University.
William J. Palumbo
Bill formerly served on the Executive Staff at Virage Logic Corp where he was VP & GM of High Density Memory, ran international design and software development teams in India, Armenia and the US as well as led engineering productivity initiatives. Bill also served a sales support role as executive sponsor for various major customer accounts. Prior to Virage, Bill was the Director of Engineering for the Physical Library Division of Mentor Graphics Corp which was later acquired by Virage. Bill built up the Physical IP business at Mentor to include foundation IP as well as worked on various Specialty IP and chip design projects. He also authored IP development CAD tools for Memory Compilation. He brokered several IP partnerships with 3rd parties to expand Mentor’s offerings. Before joining Mentor, Bill worked at several large semiconductor companies including RCA/GE/Harris semiconductor divisions in various capacities of IC Design and management. Bill has executive training in management and finance and holds a BSEE from Rutgers University.
Dr. Michael L. Bushnell
Mike has over 30 years of academic and industrial experience in the areas of design and test of VLSI circuits. He is a full professor and a Board Of Trustees Research fellow at the ECE Dept of Rutgers University, New Jersey USA. Mike was elected as an IEEE fellow for his work in the areas of Design For Test (DFT) and Design for Manufacturability (DFM). Mike has published over 100 papers and was awarded 13 patents in the areas of circuit and test. Research conducted in his labs resulted in successful technology transfer to semiconductor design and manufacturing companies, most notably to NEC IBM and Bell Labs. On the academic front he has published a textbook on Test, which is widely used for DFT courses. Mike was selected from all fields of science for the Presidential Young Investigator Award by the National Science foundation that came with a $500,000 research grant award. Earlier in his career Mike worked at General Electric Co, Honeywell Inc and Applicon Inc. Mike received his BS from MIT in Compute Engineering and has MS & Phd from Carnegie Mellon in the field of Electrical Engineering. |
